14.4 A 1V 1mW CMOS Front-End with On-chip DynamicGate Biasing for a 75Mb/s Optical Receiver

Optical communications is rapidly expanding beyond long-haul fiber-optic networks into shorter distance, lower-cost applications such as infrared wireless links and fiber-to-the-home (FTTH). CMOS implementations of optical receivers are attractive given their reduced cost and size, but the trend towards lower system voltages in CMOS challenges the long-term viability of integrated designs. Traditionally, low-voltage operation has not been a requirement, and few receiver designs have pushed below 2V where low voltage seriously impacts performance. To date, the lowest reported design uses low-threshold devices to achieve 1.2V operation [1]. In contrast, the optical front-end presented here achieves 1V operation without special devices.